FPGA达成流水式排序算法

该算法采用双调排序算法，是一种可流水的递推算法，且算法的消耗时长可算，具体细节参考视频：

https://www.bilibili.com/video/BV1S3thzWEnh/?spm_id_from=333.1387.homepage.video_card.click&vd_source=69fb997b62efa60ae1add8b53b6a5923

module bitonic_sort(
input						i_clk	,
input						i_rst	,
input		[16 * 16 - 1:0]	i_buff	,
output		[16 * 16 - 1:0]	o_buff
);
localparam WIN = 16;
wire	signed	[15:0]	w_data_buff	[0:15];
genvar i;
genvar j;
generate
for(i = 0; i  w_data_buff[i * 4 + 1]) begin//升序
r_bitonic_pipe0[i * 4] 		 r_bitonic_pipe0[i * 8 + j + 2]) begin//升序
r_bitonic_pipe1[i * 8 + j]		 r_bitonic_pipe1[i * 8 + j * 2 + 1]) begin//升序
r_bitonic_pipe2[i * 8 + j * 2]		 r_bitonic_pipe2[i + 4]) begin//升序
r_bitonic_pipe3[i]		 r_bitonic_pipe3[i * 4 + j + 2]) begin
r_bitonic_pipe4[i * 4 + j] 		 r_bitonic_pipe4[i * 2 + 1]) begin
r_bitonic_pipe5[i * 2]		 r_bitonic_pipe5[i + 8]) begin
r_bitonic_pipe6[i]		 r_bitonic_pipe6[i * 8 + j + 4]) begin
r_bitonic_pipe7[i * 8 + j]		 r_bitonic_pipe7[i * 4 + j + 2]) begin
r_bitonic_pipe8[i * 4 + j]		 r_bitonic_pipe8[i * 2 + 1]) begin
r_bitonic_pipe9[i * 2]		<= r_bitonic_pipe8[i * 2 + 1];
r_bitonic_pipe9[i * 2 + 1]	<= r_bitonic_pipe8[i * 2];
end
else begin
r_bitonic_pipe9[i * 2]		<= r_bitonic_pipe8[i * 2]	;
r_bitonic_pipe9[i * 2 + 1]	<= r_bitonic_pipe8[i * 2 + 1];
end
end
end
end
endgenerate
generate
for(i = 0; i < 16; i = i + 1) begin
assign	o_buff[i * 16 + 15:i * 16] = r_bitonic_pipe9[i];
end
endgenerate
endmodule